数据结构设计

enum artinchip_mmc_state {
    STATE_IDLE = 0,
    STATE_SENDING_CMD,
    STATE_SENDING_DATA,
    STATE_DATA_BUSY,
    STATE_SENDING_STOP,
    STATE_DATA_ERROR,
    STATE_SENDING_CMD11,
    STATE_WAITING_CMD11_DONE,
};

struct artinchip_mmc {
    spinlock_t      lock;
    spinlock_t      irq_lock;
    void __iomem        *regs;
    void __iomem        *fifo_reg;
    bool            wm_aligned;

    struct scatterlist  *sg;
    struct sg_mapping_iter  sg_miter;

    struct mmc_request  *mrq;
    struct mmc_command  *cmd;
    struct mmc_data     *data;
    struct mmc_command  stop_abort;
    unsigned int        prev_blksz;
    unsigned char       timing;

    /* DMA interface members*/
    bool            use_dma;
    bool            using_dma;

    dma_addr_t      sg_dma;
    void            *sg_cpu;
    const struct artinchip_mmc_dma_ops  *dma_ops;
    /* For idmac */
    unsigned int        ring_size;

    /* Registers's physical base address */
    resource_size_t     phy_regs;

    u32         cmd_status;
    u32         data_status;
    u32         stop_cmdr;
    u32         dir_status;
    struct tasklet_struct   tasklet;
    unsigned long       pending_events;
    unsigned long       completed_events;
    enum artinchip_mmc_state    state;
    struct list_head    queue;

    u32         bus_hz;
    u32         current_speed;
    u32         fifoth_val;
    u16         verid;
    struct device       *dev;
    struct artinchip_mmc_board  *pdata;
    const struct artinchip_mmc_drv_data *drv_data;
    void            *priv;
    struct clk      *biu_clk;
    struct clk      *ciu_clk;
    struct artinchip_mmc_slot   *slot;

    /* FIFO push and pull */
    int         fifo_depth;
    int         data_shift;
    u8          part_buf_start;
    u8          part_buf_count;
    enum data_width data_width;
    union {
        u16     part_buf16;
        u32     part_buf32;
        u64     part_buf;
    };

    bool            vqmmc_enabled;
    unsigned long       irq_flags; /* IRQ flags */
    int         irq;

    struct timer_list       cmd11_timer;
    struct timer_list       cto_timer;
    struct timer_list       dto_timer;
};

struct artinchip_mmc_board {
    unsigned int bus_hz; /* Clock speed at the cclk_in pad */

    u32 caps;   /* Capabilities */
    u32 caps2;  /* More capabilities */
    u32 pm_caps;    /* PM capabilities */
    /*
     * Override fifo depth. If 0, autodetect it from the FIFOTH register,
     * but note that this may not be reliable after a bootloader has used
     * it.
     */
    unsigned int fifo_depth;

    /* delay in mS before detecting cards after interrupt */
    u32 detect_delay_ms;

    struct reset_control *rstc;
    struct artinchip_mmc_dma_ops *dma_ops;
    struct dma_pdata *data;
};

struct artinchip_mmc_slot {
    struct mmc_host     *mmc;
    struct artinchip_mmc        *host;

    u32         ctype;

    struct mmc_request  *mrq;
    struct list_head    queue_node;

    unsigned int        clock;
    unsigned int        __clk_old;

    unsigned long       flags;
#define ARTINCHIP_MMC_CARD_PRESENT  0
#define ARTINCHIP_MMC_CARD_NEED_INIT    1
#define ARTINCHIP_MMC_CARD_NO_LOW_PWR   2
#define ARTINCHIP_MMC_CARD_NO_USE_HOLD 3
#define ARTINCHIP_MMC_CARD_NEEDS_POLL   4
};

struct artinchip_mmc_drv_data {
    unsigned long   *caps;
    u32     num_caps;
    int     (*init)(struct artinchip_mmc *host);
    int     (*parse_dt)(struct artinchip_mmc *host);
    int     (*execute_tuning)(struct artinchip_mmc_slot *slot, u32 opcode);
    int     (*switch_voltage)(struct mmc_host *mmc,
                      struct mmc_ios *ios);
};