系统参数配置

2 Dec 2024

Read time: 3 minute(s)

系统参数主要存放于 target/board/common/board.dtsi 文件中，例如 target/d211/common/d211.dtsi。模块系统参数随着 IC 的变化而改变，不建议用户修改。各类型显示屏常见的系统参数如下所示：

Display FB0

display-fb {
    compatible = "artinchip,aic-framebuffer";
    #address-cells = <1>;
    #size-cells = <0>;
    fb0: fb@0 {
        reg = <0x0 0x0>;
    };
};

Display Engine

de0: de@18a00000 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "artinchip,aic-de-v1.0";
    reg = <0x0 0x18a00000 0x0 0x1000>;
    interrupts-extended = <&plic0 59 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&cmu CLK_DE>, <&cmu CLK_PIX>;
    clock-names = "de0", "pix";
    resets = <&rst RESET_DE>;
    reset-names = "de0";
    mclk-rate = <200000000>;
};

RGB Display Interface

rgb0: rgb@18800000 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "artinchip,aic-rgb-v1.0";
    reg = <0x0 0x18800000 0x0 0x1000>;
    clocks = <&cmu CLK_RGB>, <&cmu CLK_SCLK>;
    clock-names = "rgb0", "sclk";
    resets = <&rst RESET_RGB>;
    reset-names = "rgb0";
};

RGB Display Interface

lvds0: lvds@18810000 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "artinchip,aic-lvds-v1.0";
    reg = <0x0 0x18810000 0x0 0x1000>;
    clocks = <&cmu CLK_LVDS>, <&cmu CLK_SCLK>;
    clock-names = "lvds0", "sclk";
    resets = <&rst RESET_LVDS>;
    reset-names = "lvds0";
};

MIPI-DSI Display Interface

dsi0: dsi@18820000 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "artinchip,aic-mipi-dsi-v1.0";
    reg = <0x0 0x18820000 0x0 0x1000>;
    clocks = <&cmu CLK_MIPIDSI>, <&cmu CLK_SCLK>;
    clock-names = "dsi0", "sclk";
    resets = <&rst RESET_MIPIDSI>;
    reset-names = "dsi0";
    interrupts-extended = <&plic0 56 IRQ_TYPE_LEVEL_HIGH>;
    data-lanes = <0 1 2 3>;
    lane-polarities = <0 0 0 0>;
};

MIPI-DSI Display Interface

dbi0: dbi@18800004 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "artinchip,aic-dbi-v1.0";
    reg = <0x0 0x18800000 0x0 0x1000>;
    clocks = <&cmu CLK_DBI>, <&cmu CLK_SCLK>;
    clock-names = "dbi0", "sclk";
    resets = <&rst RESET_DBI>;
    reset-names = "dbi0";
};